Product Summary

The CY7C341B-25JC is an Erasable Programmable Logic Device (EPLD) in which CMOS EPROM cells are used to configure logic functions within the device. The MAX architecture is 100% user-configurable, allowing the CY7C341B-25JC to accom-modate a variety of independent logic functions.

Parametrics

CY7C341B-25JC absolute maximum ratings: (1)Storage Temperature: -65 to +135℃; (2)Ambient Temperature with Power Applied: –65 to +135℃; (3)Maximum Junction Temperature (Under Bias): 150℃; (4)Supply Voltage to Ground Potential: -2.0V to +7.0V; (5)DC Output Current, per Pin: -25 mA to +25 mA; (6)DC Input Voltage: -2.0V to +7.0V.

Features

CY7C341B-25JC features: (1)192 macrocells in 12 logic array blocks (LABs); (2)Eight dedicated inputs, 64 bidirectional I/O pins; (3)Advanced 0.65-micron CMOS technology to increase performance; (4)Programmable interconnect array; (5)384 expander product terms; (6)Available in 84-pin HLCC, PLCC, and PGA packages.

Diagrams

CY7C341B-25JC block diagram

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CY7C341B-25JC
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0-1: $16.80
1-25: $13.44
25-100: $12.59
100-250: $11.76